1. Field of the Invention
The present invention relates to a cavity resonator for reducing the phase noise of microwaves or millimeter waves output from a monolithic microwave integrated circuit (MMIC) voltage controlled oscillator (VCO) by using silicon (Si) or a compound semiconductor and a micro electro mechanical system (MEMS), and a method for fabricating the cavity resonator.
2. Description of the Related Art
Conventional MMICs or hybrid VCOs frequently use dielectric disks or transmission lines as resonators. However, dielectic resonators for micro/millimeter waves are very expensive and are difficult to mass produce because the frequency at which resonance occurs depends on the location of the dielectric resonators and it is difficult to specify the location of the dielectric resonators in an MMIC substrate or hybrid VCO substrate. Moreover, the Q-factor of transmission line resonators are too small to reduce phase noise.
To solve the above problems, it is an objective of the present invention to provide a cavity resonator for reducing the phase noise of a voltage controlled oscillator and a method for fabricating the cavity resonator, wherein, instead of a conventional meal cavity, a cavity which is obtained by finely processing silicon or a compound semiconductor, is combined with a microstrip line to allow the cavity resonator to be used in a reflection type voltage controlled oscillator.
Accordingly, to achieve the above objective, there is provided a cavity resonator for reducing the phase noise of a voltage controlled oscillator. The cavity resonator includes a cavity formed by shaping a semiconductor into a rectangular parallelepiped and plating the surfaces of the rectangular parallelepiped with a conductive thin film. A microstrip line serves as a waveguide at a predetermined distance from the upper thin film of the cavity. A pole couples the end of the microstrip line to a predetermined location of the lower thin film of the cavity. A coupling slot is formed by removing a section, having a predetermined width, of the upper thin film of the cavity. The removed section corresponds to the area of the upper thin film which would come in contact with the pole. A resistive thin film is formed around the part of the lower thin film which comes in contact with the pole, for impedance matching. The conductive thin film, the microstrip line and the metal pole, may be formed of a conductor selected form the group consisting of gold (Au), silver (Ag) and copper (Cu). Preferably, the conductive thin film, the microstrip line and the metal pole, are formed of gold (Au).
There is also provided a method for fabricating a cavity resonator for reducing the phase noise of a voltage controlled oscillator, wherein first, second and third wafers are made to form a metal cavity coupled to a microstrip line via a conductor pole. The method includes the step of forming a microstrip line by depositing chromium (Cr) on one surface of the first wafer, forming a microstrip pattern in the chromium, and plating the microstrip line pattern with gold. An upper metal pole and a cavity upper thin film are formed by forming a via-hole and a coupling slot on the bottom surface of the first wafer, and plating the bottom surface and sidewalls of the via-hole with gold. A cavity lower thin film is formed by depositing chromium (Cr) on the top surface of the third wafer and patterning the chromium to form patterns used for forming an area which will come in contact with the conductor pole and a matching resistor. Then gold plate and a resistive film are deposited on the resultant pattern. The second wafer is bonded to the third wafer. A cavity is formed by etching the second wafer bonded to the third wafer until the cavity lower thin film formed on the third wafer is exposed, while allowing the part of the second wafer corresponding to the lower part of the conductor pole to remain. The metal cavity and a lower metal pole are formed by plating the cavity and the part corresponding to the lower part of the conductor pole with chromium (Cr) and gold (Au). The first wafer is bonded to the exposed surface of the second wafer, which is bonded to the third wafer, such that the metal pole formed in the via-hole of the first wafer is coupled to the lower metal pole formed on the second wafer.